Practice Digital Principles And System Design Multiple Choice Questions with Answers Quiz-2

Q.1.

Sequential circuits are represented as

finite state machine
infinite state machine
finite synchronous circuit
infinite asynchronous circuit

Q.2.

Which of the following attribute is generally used in implementation of sequential circuits?

‘stable
‘length
‘last_event
‘event

Q.3.

Which of the following will give the sum of full adders as output?

three point major circuit
three bit parity checker
three bit comparator
three bit counter

Q.4.

What is the indication of a short to ground in the output of a driving gate?

only the output of the defective gate is affected
there is a signal loss to all load gates
the node may be stuck in either the high or the low state
the affected node will be stuck in the high state

Q.5.

A stepper motor HDL application must include

types and bits
sequencers and multiplexers
counters and decoders
variables and processes

Q.6.

Iterative test generation method suits for circuits with

no feedback loops
more feedback loops
few feedback loops
negative feedback loops only

Q.7.

What does the data signal do in the keypad application?

the row and column encoded data
the freeze locator data
the ring encoded data
the ring counter data

Q.8.

4 COUNTERS

0 to 2n
0 to 2n + 1
0 to 2n – 1 d) 0 to 2n+1/2
All of above

Q.9.

Which of the following method is not used to remove the race around condition in a flip flop?

using level triggered flip flop
using master slave flip flop
using edge triggered flip flop
all of the above are used to remove the race around

Q.10.

Which of the following line is correct for detecting positive edge of a clock?

if (clk’event and clk = ‘0’)
if (clk’event and clk = ‘1’)
if (clk’event or clk = ‘0’)
if (clk’event or clk = ‘1’)

Q.11.

The stalling of the processor due to the unavailability of the instructions is called as

control hazard
structural hazard
input hazard
none of the mentioned

Q.12.

Sequential circuit includes

delays
feedback
delays and feedback from input to output
delays and feedback from output to input

Q.13.

Which constitutes the test vectors in sequential circuits?

feedback variables
test patterns
delay factors
all input combinations

Q.14.

Outputs are functions of

present state
next state
previous state
present and next state

Q.15.

Which is the delay elements for clocked system?

and gates
or gates
flip-flops
multiplexers

Q.16.

Which contributes to the necessary delay element?

flip-flops
shift registers
negative feedback path
circuit propagation elements

Q.17.

Which method is very time consuming?

d-algorithm
iterative
pseudo exhaustive method
iterative test generation

Q.18.

What is the complement of X’Y’Z?

x+yz
x’+y+’z’
x+y+z’
xyz’

Q.19.

The minterm of any expression is denoted by

mt
m
m
min

Q.20.

Odd parity of word can be conveniently tested by

or gate
and gate
nand gate
xor gate

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