Q.1.
Clock speed is measured in
Q.2.
Which of the following parallel algorithm models is applicable to web server?
Q.3.
Intelmicroprocessor has an instruction set ofinstruction. The opcode to implement this instruction set should be at least
Q.4.
The CISC stands for
Q.5.
The iconic feature of the RISC machine among the following are
Q.6.
In a single byte how many bits will be there?
Q.7.
From where interrupts are generated?
Q.8.
Which one of the following is most suitable to make a parity checker
Q.9.
Interrupts which are initiated by an instruction are
Q.10.
In CISC architecture most of the complex instructions are stored in _____.
Q.11.
Which architecture supports more than one processor working on more than one data stream?
Q.12.
Why can dual core processors be considered better than single core?
Q.13.
Which of the following affects the performance of a CPU?
Q.14.
Which of the following parallel methodological design elements focuses on recognizing opportunities for parallel execution?
Q.15.
Which architecture uses the least power?
Q.16.
Data dependence is
Q.17.
Synchronous communication operations referred to
Q.18.
Load balancing is
Q.19.
These computer uses the stored-program concept. Memory is used to store both program and data instructions and central processing unit (CPU) gets instructions and/ or data from memory. CPU, decodes theinstructions and then sequentially performs them.
Q.20.
Here a single program is executed by all tasks simultaneously. At any moment in time, tasks can be executing the same or different instructions within the same program. These programs usually have the necessary logic programmed into them to allow different tasks to branch or conditionally execute only those parts of the program they are designed to execute.