Which of the following logic families has the shortest propagation delay?
-
S-TTL -
AS-TTL -
HS-TTL -
HCMOS
The upper transistor of a totem-pole output is OFF when the gate output is low.
-
True -
False
The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:
-
emitter-coupled logic (ECL). -
current-mode logic (CML). -
transistor-transistor logic (TTL). -
emitter-coupled logic (ECL) and transistor-transistor logic (TTL).
The noise margin for TTL is 0.8 V.
-
True -
False
What type of logic circuit is shown below and what logic function is being performed? >
-
It is an NMOS AND gate. -
It is a CMOS AND gate. -
It is a CMOS NOR gate. -
It is a PMOS NAND gate.
What type of logic circuit is shown below and what logic function is being performed? >
-
It is an NMOS AND gate. -
It is a CMOS AND gate. -
It is a CMOS NOR gate. -
It is a PMOS NAND gate.
Which of the following logic families has the highest noise margin?
-
TTL -
LS TTL -
CMOS -
HCMOS
The propagation delay of standard TTL gates is approximately ________.
-
2 
s -
1 s -
4 ns -
10 ns
Which of the following logic families has the highest noise margin?
-
TTL -
LS TTL -
CMOS -
HCMOS
What type of logic circuit is shown below and what logic function is being performed? >
-
It is an NMOS AND gate. -
It is a CMOS AND gate. -
It is a CMOS NOR gate. -
It is a PMOS NAND gate.