Practice Logic Families And Their Characteristics Multiple Choice Questions with Answers Quiz-1

Q.1.

What is the advantage of using low-power Schottky (LS) over standard TTL logic?

more power dissipation
less power dissipation
cost is less
cost is more

Q.2.

The term buffer/driver signifies the ability to provide low output currents to drive light loads.

True
False

Q.3.

Assume that a particular IC has a supply voltage (V_cc) equal to +5 V and I_CCH = 10 mA and I_CCL = 23 mA. What is the power dissipation for the chip?

50 mW
82.5 mW
115 mW
165 mW

Q.4.

Which of the following summarizes the important features of emitter-coupled logic (ECL)?

low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption
good noise immunity, negative logic, high-frequency capability, low power dissipation, and short propagation time
low propagation time, high-frequency response, low power consumption, and high output voltage swings
poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power

Q.5.

How does the 4000 series of CMOS logic compare in terms of speed and power dissipation to the standard family of TTL logic?

more power dissipation and slower speed
more power dissipation and faster speed
less power dissipation and faster speed
less power dissipation and slower speed

Q.6.

When is a level-shifter circuit needed in interfacing logic?

A level shifter is always needed.
A level shifter is never needed.
when the supply voltages are the same
when the supply voltages are different

Q.7.

PMOS and NMOS ________.

represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate
are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC
represent positive and negative MOS-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers
None of the above

Q.8.

Can a 74HCMOS logic gate directly connect to a 74ALSTTL gate?

Yes
No

Q.9.

What is the major advantage of ECL logic?

very high speed
wide range of operating voltage
very low cost
very high power

Q.10.

Why is a pull-up resistor needed for an open collector gate?

to provide V_cc for the IC
to provide ground for the IC
to provide the HIGH voltage
to provide the LOW voltage

Q.11.

What is the difference between the 54XX and 74XX series of TTL logic gates?

54XX is faster.
54XX is slower.
54XX has a wider power supply and expanded temperature range.
54XX has a narrower power supply and contracted temperature range.

Q.12.

What is the standard TTL noise margin?

5.0 V
0.0 V
0.8 V
0.4 V

Q.13.

Totem-pole outputs ________ be connected ________ because ________.

can, in parallel, sometimes higher current is required
cannot, together, if the outputs are in opposite states excessively high currents can damage one or both devices
should, in series, certain applications may require higher output voltage
can, together, together they can handle larger load currents and higher output voltages

Q.14.

What should be done with unused inputs to a TTL NAND gate?

let them float
tie them LOW
tie them HIGH

Q.15.

A TTL totem-pole circuit is designed so that the output transistors:

are always on together
provide linear phase splitting
provide voltage regulation
are never on together

Q.16.

Why is the operating frequency for CMOS devices critical for determining power dissipation?

At low frequencies, power dissipation increases.
At high frequencies, the gate will only be able to deliver 70.7 % of rated power.
At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.
At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.

Q.17.

As a general rule, the lower the value of the speed–power product, the better the device because of its:

long propagation delay and high power consumption
long propagation delay and low power consumption

Q.18.

What is the range of invalid TTL output voltage?

0.0–0.4 V
0.4–2.4 V
2.4–5.0 V
0.0–5.0 V

Q.19.

Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?

to increase the output LOW voltage
to decrease the output LOW voltage
to increase the output HIGH voltage
to decrease the output HIGH voltage

Q.20.

An open collector output can ________ current, but it cannot ________.

sink, source current
source, sink current
sink, source voltage
source, sink voltage

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