Q.1.
The watchdog counts up and resets the MSPwhen it reaches the limit?
Q.2.
Which of the following is correct about WDTCTL?
Q.3.
WDTNMI is found in the _________
Q.4.
Which of the following bits reads 0 under normal conditions but goes 1 when it wants to initiate some action?
Q.5.
WDTISx bits control the _________
Q.6.
The process of setting the WDTCNTCL bit in WDTCTL is through
Q.7.
What is the function of this instruction “WDTCTL = WDTPW | WDTCONFIG”, where **#define WDTCONFIG (WDTCNTCL|WDTSSEL)**
Q.8.
Is this instruction correct?
Q.9.
Setting the WDTTMSEL bit of the WDTCTL register makes the watchdog timer act as
Q.10.
WDTIFG flag gets cleared if