Q.1.
SIGNED and UNSIGNED data types are defined in which package?
Q.2.
What is the correct method to declare a SIGNED type signal ‘x’?
Q.3.
An UNSIGNED type is always greater than zero.
Q.4.
What will be the value of x in the following code? SIGNAL x : IN UNSIGNED (3 DOWNTO 0 ); x <= “1101”;
Q.5.
What is the decimal equivalent of x in the following code? SIGNAL x : OUT SIGNED (3 DOWNTO 0 ); x <= “1101”;
Q.6.
Which of the following option is completely legal, given that a and b are two UNSIGNED type signals?
Q.7.
If a and b are two STD_LOGIC_VECTOR input signals, then legal assignment for a and b is?
Q.8.
What do we call the data type used for representing distance, current, voltage, time, etc?
Q.9.
What is the meaning of the base unit?
Q.10.
Which of the following is only predefined physical literal in VHDL?
Q.11.
SIGNAL a : REAL; which of the following is illegal assignment for a?
Q.12.
Multidimensional arrays can be used for the implementation of memories.
Q.13.
RECORD in VHDL is similar to________ in C.
Q.14.
What is the difference between SIGNAL and VARIABLE?
Q.15.
Access types are similar to _________ in traditional programming languages.